| ??? 10/11/07 20:14 Read: times |
#145668 - Don't cares worked for me Responding to: ???'s previous message |
Mike said:
Under the synthesize menu, there is an option to view RTL schematic. You can see it generates quite a bit of logic for that little piece of code. Yes. I've been looking at both the RTL schematic and the "technology schematic" to try to figure out what the synthesizer does. Why, I don't know, but I've never had much luck using don't cares in HDL descriptions (2'dx = don't care in Verilog?). Yes, 'x' meanas don't care in Verilog. The '2' means "give me two bits' worth", and the 'd' specifies that it's a decimal number (which of course doesn't matter in the the case of the don't care, but I think you have to put something there anyway.) More to the point, using the don't care like that did some good, at least on this simple example. When I tried it with 0 instead of the don't care, it generated even more logic, even though it could still have gotten by with just the two wires. -- Russ |
