Whoa, Nelly! Thanks again, Andy, for all the effort you're putting into this. If nothing else, we are going to prove to the world the truth of your original assertion that making a Verilog programmer out of a C programmer is not slam dunk proposition!

Your last batch of comments and the revised example have given me something to chew on for at least a few days, I think. In the meantime, however, I'm still wondering about that reset question. If you could indulge me with an answer (or a pointer to an answer) to that, I promise to leave you alone for a while. How's that for incentive? :)

Thanks again,

-- Russ