There's a perception (amongst people who don't know what they're talking about) that since some Verilog operators and some of its syntax is kinda like C, then a person (software type) who knows C can just jump right in and learn Verilog.

For example, the comparison and boolean operators are the same for Verilog and C.

However, the perception is ridiculous. Forget anything and everything you know about C (and procedural programming languages!) and approach Verilog (and VHDL) with an open mind. And always remember: THINK HARDWARE.

-a