| ??? 09/24/07 23:13 Read: times |
#144941 - re: Unplugged Responding to: ???'s previous message |
Russ Cooper said:
Wow. Thanks for another great post. If you keep this up, I may have to drive to Tucson and buy you a taco. Excellent tacos at the J-Bar ... The freebie Xilinx ISE software came with an integrated simulator. I also grabbed the special Xilinx edition of ModelSim from the Xilinx website, but I haven't done anything with it yet. How would a guy pick one of these over the other? I haven't used the Xilinx logic simulator since the bad old days of XACT. I don't think it supports HDL simulation, so if you need to simulate your Verilog, use ModelSim. Do you think the little counter module we've been talking about is about the right size and complexity for a first attempt at a test bench? Yep. For something that simple, all the test bench needs to do is provide a clock and a reset, and you'll find it easiest just to look at the waveforms and see when the outputs change. (BTW: simulate without the reset and you'll see why you need one.) More complex testbenches can be made self-checking. Than can get complicated. -a |
