??? 11/13/06 19:57 Read: times |
#127900 - Yes, but ... and there's always a but ... Responding to: ???'s previous message |
True enough, some folks do understand a map better than a text-only route description. There's more to that, though, and, no, it's not ALL age-related. Two things come into play here.
Consider, for a moment the analogy between a map and a schematic diagram, and schematic diagrams are used in places far outside electronics. If you put the entire map on a single sheet, and just zoom in to the areas of interest, you always have a sense of where you are in the local universe you're exploring. If you have a stack of listing pages, whether HDL or route description, it's a different world. Perish the thought that you'd shuffle the pages in your route description, particularly if it's modular, hence, has discontinuous page numbers. If you KNOW that everybody can read a map, then the map is generally the best way to tell folks where the picnic is. If you give them a route description, in, say German, then there will be folks who understand it better than others, and the likelihood that everyone will get to the picnic will be diminshed. That's OK so long as the guy with the keg reads and understands German. Since YOU, Russ, are new to programmable logic, I'm assuming you did learn how to read schematics, at least as superficially as it's taught in undergrad logic circuits courses, and, perhaps, from looking at enough schematics of MCU circuits. It was my thought that getting started would be easier if you didn't have to worry about the multiple power supplies, multiple steps in implementing logic in an FPGA, and multiple years (well maybe if we include the vagaries of the tools) of learning one or another HDL before you can be sufficiently CONFIDENT that your logic will work as you planned. If you'd rather learn to do things in one HDL or another, that's not my concern, though you won't be welcome around here if you can't express your logic in symbolic form as well. My emphasis is not on how the logic is to be entered, but on how it is to be presented for analysis and review. The guys who pay for logic design want to be assured that they're getting what they want. Many of them have never learned anything about HDL's, since they were busy building a successful business. They did learn to read schematic diagrams, whether they were trained as Electrical, Civil, Mechanical, Chemical, or Nuclear engineers. It's THAT level of presentation that matters. The symbols can have underlying HDL descriptions, but the presentation should be in a form with which the reviewers are comfortable. Some people are uncomfortable with reviews. They prefer to obfuscate their work in "clever" 'C' code or esoteric HDL expression. Perhaps it's because they haven't done all the groundwork and lack confidence in what they've delivered. I have on sympathy for them. I implore you not to become one. RE |