??? 11/13/06 14:43 Read: times |
#127880 - In a nutshell Responding to: ???'s previous message |
The main differences between HDL vs schematic entry are abstraction, portability, and maintenance.
HDLs allow a much greater level of abstraction than a design entered schematically. The downside is that you have less control over how the design is actually implemented and the performance can suffer. Sort of like the assembler versus C/C++ debate. However, modern synthesizers are so good that this is largely irrelevant. Designs entered schematically suffer greatly from not being portable or easily modifiable. HDL descriptions provide technology-independent documentation of a design and its functionality. HDLs also give you much more flexibility when it comes to parameterizing your design. HDLs also don't require a propietary viewer to browse the design. Lastly, large designs are easier to handle with HDL tools than schematic tools Of course you can always mix and match design styles. I usually do the majority in HDL but make the top level a schematic. Russ Cooper said:
So to tie this in with the HDL vs. schematic debate, here's a question that may be so naive that it is stupid. But I'll ask it anyway: Aren't there tools that automatically generate guaranteed-equivalent schematic diagrams from HDL? If not, why not? It seems that if some hotdog piece of software can synthesize a chunk of logic from a chunk of HDL, it would be a minor matter for it to spit out a schematic diagram as part of the bargain. Such tools do exist but the quality varies greatly. You can usually generate both an RTL and a technology schematic from a synthesized HDL netlist. The quality of said view depends on the synthesis tool you use. |