Hi Roger,

I'm not quite sure what you meant by that, but if you meant to include me in the fearful "schematic capture" crowd, I didn't make myself clear. I much prefer to design the logic of my software using pseudocode and HLL, simply because it's easier to type than to mess around drawing pictures. Then I like to use the flowcharts to verify that what I have typed is correct. That works for me because I find it easier to spot logic errors in the flowcharts than in the code. In other words, it's easier for me to see that an arrow goes off to the wrong place than to see that an ELSE is in the wrong place.

Likewise, in the case of hardware design, it seems to me that the best scenario would be to create and encode the design HDL, again because dragging symbols around on the screen and connecting them with lines seems terribly tedious and inefficient. But then I think it would be valuable to be able to check the design by looking at an automatically generated schematic that was guaranteed to be equivalent to the HDL. It seems like it would be easier to recognize wires that went to the wrong place than errors in the HDL.

Keep in mind, however, that I'm just guessing about all this, having never written a line of HDL in my life. Neither have I ever worked on a really large hardware design. As I noted in that other post, my view of the whole situation may be so naive that these ideas don't make practical sense when you get much beyond the "let's build a counter" stage.

-- Russ