Schematic entry can be useful to quickly glue some components together for a test, but thats it, anything else go HDL, Andy already said why, and i second his opinion.

both are a 'representation of Boole' and, to my knowledge, Mr. Boole never drew a scematic.

If you make something that is to do a logical function, describe it as a logical funtion, not something else.

I have seen CPLD/FPGAs represented in schematic and in logic (starting with CUPL and Abel - do you remember those) and I have spent hours trying to figure out what schematic captures did while logic descriptions take minutes.

Now, I know this is not about 'reading' but about 'describing' but is it not always so that what is easy to 'read' is also easy to debug. In my experience with logic and code the 'writing ease' is far less important than 'debugging ease'.

In my opinion, those that stick with schematic capture are the same as those that stick with assembler just for fear of the unknown.

Erik