Email: Password: Remember Me | Create Account (Free)

Back to Subject List

Old thread has been locked -- no new posts accepted in this thread
???
11/06/06 00:09
Read: times


 
#127409 - Let me explain ...
Responding to: ???'s previous message
I attempted to find the doc's for the Spartan3E "starter" kit by searching at the URL that XILINX provided for that purpose. That didn't work. Now, I've had this board in house for a couple of months, but, having looked at it briefly when I first received it, I could see it was another case of 10 pounds of sh*t in a 5-pound bag, as are most of the XILINX evaluation boards, so I'd left it on the shelf until I saw it mentioned in this thread, whereupon I went to the shelf and got the box and opened it again. It had the materials I desrcibed, and, after checking the Digilent site, where I found no doc's at all for this product, I went through the downloadable XILINX webcast that they (XILINX) had had up on their site for a time just to "get a feel" of what they expected one to get from the board. It referred me to a URL that didn't work, so, from that, I concluded that, as is often the case, they'd dropped the ball with respect to the doc's. There was, after all, a dead end in their links.

This morning, however, I found data through a different URL that included probably everything one should need. There was stil a problem, as their website completely failed to recognize my login, which I went back and verified was correctly stored. I'll have to fix that one tomorrow, else it won't let me download some of the applications.

So, the doc's are probably as complete as they're going to get, though they're definitely NOT complete (they clearly state they've left parts of it out) as one might like.

That user manual was clearly produced by the marketing department, but it's really cool! The first picture is of the board, and if you point at a component, it tells you what it is and, if you "click" on it, it moves you to the applicable part of the manual. Unfortunately, it has no "back" arrow, so you have to use the "thumb" to scroll back to the top of the document. Since it's at the very top of the document, it's not hard to get there. It's worth a look if you haven't seen this done before.

As for the other DIGILENT boards ... only one of the S-II/IIE boards I have, namely the one with the XC2S300E on it has a site for a PROM other than the 8-pin 17xxx series bipolars that Xilinx offered, none of which are large enough even to program the XC2S200's that are on the boards.

Their earliest Spartan-II board has a prototype area, but there's never been any documentation for it. However, once you've grokked out the pinout, since there's little other than the programming port/parallel port on the board, aside from power and an oscillator, you can wire-up whatever PROM you like and attach it to the 8-pin site, since there's a prototype area.

That's not the case with any of their later FPGA boards, and they keep heaping on more and more "stuff" that will get in the way later on.

Sadly, the only off-the-shelf FPGA board that I've been pretty satisfied with has been one from Insight, with an XC2S100 on it, along with a "platform PROM," an LCD, some switches, and an oscillator. This one has jumpers, however, that enable you to detach the LCD and switches, and use the jumper pins for I/O if you need 'em. Moreover, it has a proto-area on it so you can attach whatever you need. It also has on-board power, of course.

Unfortunately, AVNET has bought MEMEC, which owned Insight ... <sigh> ... it's Greshams law all over again ... the crap will force the good stuff off the market every time ...

I mentioned Digilent's proto-board, though I wasn't aware that one needed an intermediate gender-bender, though I guess that shouldn't surprise me. I can't imagine what sort of connector you have in mind for cable connections to the FX2 connector, but it's anything but "standard" 0.1". If you'd ever tried to replace one of these connectors, and, if you use 'em, I guarantee you'll get to have that experience, you'll see what I mean by fragile. Their earlier boards had connectors that mated nicely with "standard" ribbon cable and the associated IDC connectors. Those, of course, were also fragile, but more duarable than this connector.

You're right, the software is outdated, but it doesn't matter because you can obtain an equally buggy later version by downloading it. I've send countless reports to one of Xilinx's project managers regarding bugs in the new v8 ISE already, and I'll be sending in some more complaints, one of which is that the current (downloaded Friday) version doesn't know it's not supposed to mix Verilog and VHDL when it's configured for VHDL only. ModelSim doesn't like that, and the new, free, included "ISE Simulator" appears to be nearly worthless. I've not seen anything so lame since the '60's. It can simulate a counter, if you can enter one, but it can't do much else, like scale the display, or find a transition on a signal. I'm not even sure it's supposed to do those things. Oh, but for the functionality of the "good-old" v6.3.03 ... <sigh> ...

XILINX will be hearing from me in the form of a dozen or two new "webcases" this coming week, starting with a question about why ISE netlists a counter in Verilog when the configuration is for VHDL, thereby making it impossible to use ModelSim. I've found and documented about 40 bugs that totally stop progress. I'm also planning to ask why there's no doc on simulation, when they've stuffed in a new simulator.

We do have Foundation in house, but that's not what I'm trying out. If their downloadable "free" software doesn't work, then they should find another business to pursue. I can't ask my clients to buy software that doesn't at least appear to work.

Mike Hymel said:
Richard Erlacher said:

The FPGA boards came with programming cables that adapted the parallel port to the board's JTAG connector.


Those cables are awful and should never be used as any nearby noise will cause them to screw up. Only use Xilinx programming cables as they are superior to anything else available (though they cost $150 which is why this board is so great since that $150 circuit is built into the board itself).


Altera, Actel, Lattice, and Xilinx, have all used cables of that sort for years, in fact, over a decade (IIRC, I got my first one, a sample, back in '91-'92 or so), without a problem though ATMEL seems to have trouble with 'em, particularly in programming their ISP-capable 805x-core goodies. I've been using them since back in the early days of JTAG, and never have had a problem. I'm disappointed that the Digilent guys didn't find a way to make the USB work as a peripheral to the on-board FPGA as well as for the programming task, though.

Mike Hymel said:
Who in their right mind runs a LINUX OS on a soft processor core in a 500,000 gate FPGA. Maybe on a much bigger, faster FPGA with built in PowerPCs but not this one.


I've been watching folks do that sort of thing, with a lot of work being done in OZ, where they're apparently smarter than we, here in the U.S. must be, since they were doing it with Spartan-II's.

Now, don't get me wrong here ... I dislike the philosophy that this board reflects, namely that the FPGA should be loaded down with lots of "stuff" rather than being uncommitted so it could be used for "whatever." I do different things than most folks, and when I do what others do, I often do it quite differently. For that reason, I see things differently than many.

I personally can't see why one would want to run MicroBlaze on an FPGA that has PowerPC in it. In fact, I can't see why anyone would want to pay what those Virtex parts cost for anything that didn't demand that they have those features. Now, that's just me ...

I use programmable logic because it's reuseable. Most folks don't come at it from that standpoint. For that reason, maximal flexibility is more important than maximal capability. For that reason, I prefer to leave off the bells and whistles, adding them when I need 'em to ring or toot.

Since the O/P indicated he wanted to use/try the various soft 805x cores in an FPGA, I reacted to the relative unnecessity of ETHERNET, 16 MB of FLASH and 64 MB of DDR SDRAM, particularly since the interface logic will probably exceed the soft-core MCU. I disagree that it's "nuts" to implement a MicroBlaze, on this particular board, particularly when that's what both the board designer, Digilent, and the FPGA mfg, XILINX, seem to think it's intended to do.

RE

List of 81 messages in thread
TopicAuthorDate
Getting Started With FPGAs            01/01/70 00:00      
   A Book            01/01/70 00:00      
   Proceed with caution!            01/01/70 00:00      
   This is quite a nice deveolpment board            01/01/70 00:00      
   I like this board            01/01/70 00:00      
      I\'ve got one of these and can\'t recommend it            01/01/70 00:00      
         What are you talking about            01/01/70 00:00      
            Let me explain ...            01/01/70 00:00      
   generaly speaking            01/01/70 00:00      
      Damn, Jez, you need a spell-checker!            01/01/70 00:00      
         HDL-based design needs TEST BENCHES            01/01/70 00:00      
            I use 'em all the time, but ...            01/01/70 00:00      
               If your design is so simple            01/01/70 00:00      
                  What\'s important is the entry effort            01/01/70 00:00      
                     I dunno where you get these ideas from Richard            01/01/70 00:00      
                        Can you say ModelSim?            01/01/70 00:00      
                     Wrong            01/01/70 00:00      
                        Well, the schematic needs a little work            01/01/70 00:00      
                           more work?            01/01/70 00:00      
                              a few points ...            01/01/70 00:00      
                           ...            01/01/70 00:00      
                     HDL vs Schematics, take 1E6            01/01/70 00:00      
                        Thta may be great comfort to you ...            01/01/70 00:00      
                           Schematics? You're kidding!            01/01/70 00:00      
                              No, nor is my customer.            01/01/70 00:00      
                              both are a 'representation of Boole'            01/01/70 00:00      
                                 Yep, you're right...            01/01/70 00:00      
                                    To Clarify            01/01/70 00:00      
                                       schematic as equivalence check            01/01/70 00:00      
                                          Manual verification impossible because ...            01/01/70 00:00      
                                             schematic verification            01/01/70 00:00      
                                       Some more clarification            01/01/70 00:00      
                                          hanging problem            01/01/70 00:00      
                                             so will your post be            01/01/70 00:00      
                                    it's not fear of the unknown, but fear of its cost            01/01/70 00:00      
                           Static Timing Analysis and those "young engineers"            01/01/70 00:00      
                              It's a sign of the times, I suppose            01/01/70 00:00      
                                 And times change            01/01/70 00:00      
                                 senior?            01/01/70 00:00      
                                    That's because you've been avoiding the subject            01/01/70 00:00      
            I agree entirely. test benches are a pain but            01/01/70 00:00      
   Update from the OP            01/01/70 00:00      
      It's true ... we see things differently            01/01/70 00:00      
      the first buuk for any such venture            01/01/70 00:00      
      FPGA boards and that Cypress book            01/01/70 00:00      
         This may answer your question(s)            01/01/70 00:00      
   some of the references in the fpga faq            01/01/70 00:00      
      Good attitude            01/01/70 00:00      
   Also remeber to look at webistes like www.xilinx.c            01/01/70 00:00      
   My recommendation and opinions            01/01/70 00:00      
      I would stay away from Virtex-II            01/01/70 00:00      
         If you're going to fiddle with the 805x core ...            01/01/70 00:00      
            Something about life-cycles            01/01/70 00:00      
               No doubt about it.            01/01/70 00:00      
                  useful work            01/01/70 00:00      
                     Well, I beg to differ.            01/01/70 00:00      
                        salient point            01/01/70 00:00      
                           There's an area where that's not necessarily true            01/01/70 00:00      
                           FPGA Editor            01/01/70 00:00      
            Not necessarily            01/01/70 00:00      
               It's still too costly            01/01/70 00:00      
   Thanks to all            01/01/70 00:00      
   Update #2 from the OP            01/01/70 00:00      
   A testbench is...            01/01/70 00:00      
      I C            01/01/70 00:00      
         test bench            01/01/70 00:00      
            Makes sense            01/01/70 00:00      
   Yeah but...            01/01/70 00:00      
   Tristate buffer with propagation delays            01/01/70 00:00      
   Schematics vs. HDL            01/01/70 00:00      
      In a nutshell            01/01/70 00:00      
         it\'s been a while            01/01/70 00:00      
      Yes, but ... and there's always a but ...            01/01/70 00:00      
   Yep you can its called gate level design            01/01/70 00:00      
   Its really nothing to do with showing off            01/01/70 00:00      
      did you paraphrase this?            01/01/70 00:00      
      Jez, It\'s not \"sea of gates\" design, you know ...            01/01/70 00:00      
         Richards, it is there philosophy            01/01/70 00:00      
         Viewlogic            01/01/70 00:00      
   it is true            01/01/70 00:00      
   Here you go Richard graphical design exploration            01/01/70 00:00      

Back to Subject List