You probably want to avoid the high-end FPGA's in any case. These have lots of features you'll be unlikely to want to exploit. The XILINX Virtex-series, for example, has a built in Power-PC core and it's fast, but it's expensive.

The FPGA vendors are always coming out with "something new" so it won't matter what you find at the high-end, it will be obsolete next week. If you think about what your ultimate end-application is, you'll have to select an FPGA technology that is compatible with that and then "live" with it. I look for 5-volt tolerance. That's what's important to me. It may not be so important to you.

There are numerous ways in which the FPGA can be exploited in order to "speed-up" the core. There are groups of instructions that can be executed out of order, or simultaneously, and others that can be shortened. You'll be executing your program from block RAM internal to the FPGA, so it will be essentially as fast as the logic can go. Sadly, due to FPGA architectures, because of the wide gates required to recognize and identify those instructions, the core will always have several LUT-to-LUT routing delays and you'll want to design your modified core to compensate for those.

Study the prior art in order to understand why, in FPGA's that are capable of operating 16-bit counters at 250 MHz, they can only execute instructions in a 12-clock configuration at 40 MHz.

You'll have to make some choices. If your goal is to build a part that executes code developed by the existing tools, you still have a lot of latitude. If you want to "fix" some of the architectural issues, e.g. the mapping of I/O into SFR space, you can quickly come to regret it when dealing with software developmetn tools. A post-processor might solve that problem. Since we don't know what you might change, we don't know what sorts of issue will arise.

RE