I don't feel obliged to address issues not germane to the initial issue. That's a valid topic for another discussion, but I'm not sure it would be helpful to wander off into details of FPGA implementation in this context.

I don't care how someone else enters his logic. I don't care whether it's in VHDL, Verilog, Abel, Cupl, Palasm, C++, or in binary. What I suggested was that a fellow with absolutely no background in HDL, but having had SOME training, presumably in college, where they teach logic circuits now and where they use logic symbols to describe them, should use what he already knows rather than first learning how to use VHDL or Verilog.

If a guy takes an existing circuit, one with a few 74xxx components and enters it, particularly in ALTERA's Quartus software, where there's still a selection of the old war-horse components available, so he can get his "feet wet" in the programmable logic area. Now, Altera doesn't make it as easy to get from logic diagram to programmed CPLD as XILINX does, but they do make entry a bit easier by including component symbols that he's likely to encounter on the board he wants to redesign, even if it's just an exercise. CPLD's are the easier of the two programmable logic classes to use for implementing an already operating schematic consisting of 74xxx (SSI/MSI) logic. FPGA's require more operations, and produce sometimes difficult to understand (by the uninitiated) results.

Many people have the misconception that you can simply "plug in" open-core IP and start using it. It's a nice thought, but things don't work that way. It will surely be easier for the O/P to understand what's going on if he's had a bit of experience implementing popcorn logic in CPLD than wading through the additional procedures for doing so in FPGA. Aside from that, if the O/P wants to USE the logic he programs, it would be much easier for him to work with single-supply 5V0 or 3V3 CPLD's than with 1V8, 2V5, and 3V3 on the same board with his 5-volt logic. Fewer and fewer FPGA's are 5-volt tolerant, nowadays. All this is just a burden to the new user.

I say let him get his feet wet in an environment unencumbered by those issues and focused on getting something he can see working. Let him replace the already trivial logic on an MCU board with a single CPLD. As his desire to implement more complex logic grows, he can make the decision about which HDL to use. He won't be able to get far without it. All I'm advocating is to let him "start small," unencumbered by SDRAM, FLASH, VGA, PS/2, multiple power supplies, etc. He can do that stuff later, but right now it's just in the way.

RE