??? 06/21/08 17:08 Read: times |
#156091 - endianity drives me to insanity ... Responding to: ???'s previous message |
... and it's not a long drive.
I first ran into this problem a couple of years back when I was conjuring up a SERDES/modulator block for a comm link. When you left-shift data coming in to a SIPO register as bytes/words, whatever, the lsb is sent first, as the leftmost bit, and, since the XILINX libraries don't have right-shift registers ... well, I got used to that. Now, if you're doing your comm's using a packet in the form of a bit-vector of length, say, 1500. So, you have that long a bit vector and the first bit you "see" is the leftmost bit. However, if you specify that bit vector in HEX rather than in binary, which bit is the lsb? Now I'm about to fiddle with a MIPS problem ... how does it arrange its bits/bytes/words/long words ... <sigh> ... RE |