There are various ways to generate buses of a given width and assign a value to them, one of the easiest ways is to define a buss which has a range of possible values so you could say something like
constant bus_width:=48;
signal jezmobus :std_logic_vector(bus_width'range);

or if you want to perform arithmetic operations of the bus then you might use

signal jezmobus : unsigned(bus_width'range);