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???
05/31/08 21:21
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#155337 - it's not the technology ...
Responding to: ???'s previous message
It's the people who did the work who created a worldwide cellphone system with orders of magnitude more failures per second than the old hard-wired system gave us. I've been using the land lines for over 50 years and can't recall that I have ever had a dropped call, or even a dropped syllable. When I got my cellphone, which a client bought me just so he could get me when I was away, I had more dropped calls and lost syllables the first day than I could tolerate. It's been on my desk for over 5 years, and even the guy who bought it for me doesn't like 'em anymore.

You're right to ask that question about how many pages of schematic is equivalent to that 1000-page stack of HDL. However, the entire schematic can fit on one sheet ... an 'E' size, maybe, but one, and only one, that hangs on the wall and that you can point at with your pointer, a laser pointer if you like. The reason is that one can abstract a lengthy HDL listing or a complex circuit in a single block on the top-level diagram. However, the XILINX schematic editor makes that nearly impossible, because, like many other piece-of-rubbish software efforts, it's generated by people who'll never have to use it to earn their living. Some things are quite concise, expressed in VHDL, as compared with an equivalent gate-level schematic. However, most folks accustomed to schematics are accustomed to and familiar with many macro functions, as provided by MSI functions, and those vastly reduce the paper area required for a given set of functions.

Now, what I do whenever I have, say, a nybble-to-7-segment translation function, is use the HDL version with its 4-bit input bus and 7-bit output bus, as a block on the top-level diagram, and allow anyone who questions how or whether it works to examine it in detail, including documentation and equivalent schematic. Likewise, if someone wants to look at, say, a PLL, they can do the same, just in case they want to know in more detail what that block represents. That's easy if one has a decent schematic editor and translator. XILINX hasn't provided one. ... at least not yet ... despite the fact they once had one.

If the guys who wrote the crappy software were locked in a room, which was welded shut, with no phone, no bathroom, and no food or water, and then had to design, implement, and verify a PC-motherboard-size bit of hardware, using 20 MHz '386SX processors with the OS-minimum of RAM, HD space, etc, and weren't allowed to leave the room or send out for pizza and beer until it was documented completely, verified, and long-term tested, the ones who survived, if any, would do the job right next time, else their successors, having learned of their fate, would do so.

RE



List of 51 messages in thread
TopicAuthorDate
xilinx ISE 10.1 is broken            01/01/70 00:00      
   a lot of their stuff has been broken lately ...            01/01/70 00:00      
   broken!            01/01/70 00:00      
      JSM            01/01/70 00:00      
   ah ha well.....            01/01/70 00:00      
      v7 was a stab at a rewrite, as was v8            01/01/70 00:00      
         Schematic?            01/01/70 00:00      
            Once upon a time ...            01/01/70 00:00      
               jesus            01/01/70 00:00      
                  it's not the technology ...            01/01/70 00:00      
                     kind of            01/01/70 00:00      
                        Is the synthesis really wrong, or just the RTL?            01/01/70 00:00      
                           nope            01/01/70 00:00      
                              Thanks            01/01/70 00:00      
                                 Anyway            01/01/70 00:00      
                        schematic versus block diagram            01/01/70 00:00      
                        I have to take exception            01/01/70 00:00      
                           gates            01/01/70 00:00      
                  Not quite            01/01/70 00:00      
               wow talk about out of date....            01/01/70 00:00      
                  Not so fast, there, Pilgrim ...            01/01/70 00:00      
                     various ways to do that            01/01/70 00:00      
                        I'm not sure that applies ... Jez            01/01/70 00:00      
                           Can I suggest            01/01/70 00:00      
                              Thanks for the "spiritual guidance" ...            01/01/70 00:00      
                                 decimal            01/01/70 00:00      
                                 decimal            01/01/70 00:00      
                                    It's about readability            01/01/70 00:00      
                                       readability            01/01/70 00:00      
                                          also re: readability            01/01/70 00:00      
                                       re: readability            01/01/70 00:00      
                                       type conversion is a pain            01/01/70 00:00      
                                          Yes it's a pain, and it's not well explained.            01/01/70 00:00      
                                             bzzzzzzzzzzzt!            01/01/70 00:00      
                                                Its all about the doc            01/01/70 00:00      
                                                   why the different types?            01/01/70 00:00      
                                                      This is good stuff!            01/01/70 00:00      
                                                         obscurity            01/01/70 00:00      
                                                            Nearly every package has a manual            01/01/70 00:00      
                                                               buffer mode ports            01/01/70 00:00      
                                                                  buried macrocells too            01/01/70 00:00      
                                                                     experts            01/01/70 00:00      
                                                                        Yes, it's about the "experts."            01/01/70 00:00      
                                                   endianity            01/01/70 00:00      
                                                      endianity drives me to insanity ...            01/01/70 00:00      
                                                         HDL wins            01/01/70 00:00      
                     no....            01/01/70 00:00      
                  An interesting dichotomy...            01/01/70 00:00      
                     I don\'t follow ...            01/01/70 00:00      
                        Oy            01/01/70 00:00      
      not synthesizing correctly            01/01/70 00:00      

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