Whether a specific MCU that DOES have the external memory bus available is a 2 clocker or a 6 clocker doesn't matter, so long as one knows the external memory cycle timing parameters.
While what you say is absolutely correct, the "external memory cycle timing parameters" are, typically twice as fast in 6 clock mode as in 12 clock mode. Thus discussing "clock count" in an unspecific discussion about timing DOES make sense. While (I doubt it) it may be possible to drive the antique from a 12 clocker at 20MHz, I am confident that it will not be possible to do so with a 6clocker at 20MHz. e.g. the P89C51RD2 in 6 clock mode @ 20MHz has a /RD polse of 50ns. Using the same chip fully at the max oscillator freq in 12 clock mode you get 82ns which I doubt will drive the antique. So, as stated before: you can not utilize a modern derivative fully if you hook it to an antique

There's no point in discussing "expansion" of I/O on devices that have no external memory bus for now.

Why not? I expand them all the time, they have HW IIC and HW SPI

Erik