Erik ... you've got an old datasheet. The 200 ns verison certainly will run with a 33 MHz 12-clocker, and also with an 11.0592 MHz 4-clocker. The 82C55A, which is a somewhat slower version, requires a nRD pulse of 150 ns and a rd/wr recovery time of ~300 ns, which should be no problem since you do have to do something with the data before writing or after reading.

So, it's POSSIBLE to use 'em. I didn't say you should, but you CAN, if appropriate.

Further, consider the typical case that appears on 8052.COM. The query is about someone using a 40-pin DIP or PLCC-44 part. If he needs/wants, say, 132 bits of I/O, an 8255 isn't going to do it for him either. (Not a likely circumstance, but possible) What should he use? It's the general problem that's never been specifically addressed. There are numerous ways of providing the I/O, but what's the basic technique? How is it to be decoded? Where does he put it, physically? How is he supposed to connect his external hardware? All those things have never been addressed, mainly because everyone wants to trumpet his favorite gadget, and doesn't tell the guy what his options are. What's more, decisions must be made about how to provide interconnection to the outside hardware. Should it be wire, RF, fiber, and, of course, why is one preferable over the other? Not only do these questions have to be answered in order to design a successful system, but they impact the choice of devices by means of which the interface is provided.

That's why I think there should be a full, complete, rigorous, and exhaustive discussion of the question of how to expand the I/O capabilities of an 805x-core MCU. That's one advantage the 805x-series parts have over the PIC's, for example. The PIC's that I've seen have never offered an external bus interface capable of being expanded to provide additional I/O that operates at bus speed.

RE