Hi Oliver,

Whilst one could, through careful design in the planning stage, minimise the problems of interrupt latency when switching between tasks etc, I agree it would probably be an easier and more efficient solution (both from software engineering and power consumption perspectives at least) to implement a multi-core MCU..

What I would also like to see in that same MCU in my own humble-bumble opinion, is the ability to chain the multiple ALU's together to produce any of the following combinations:

1.) 4 x 8-bit MCU cores.
2.) 1 x 24-bit and 1 x 8 bit MCU core?
OR
3.) 1 x 16-bit and 2 x 8-bit MCU cores?

All cores would be able to 'read' any I/O pin, but writes to any pin would be interlocked by some mechanism. To allow for the wider-bus type cores, the instruction decoders would have to be re-programmable..

Of course, the 8-bit cores would be 8051 compatible, but that's just my preference :-) dunno about the other bit-width core configurations though, perhaps they could be some simple RISC type or perhaps even 80251-class core implementations?

Regards,
Valentin