I would have thought it a quite cheap investment to handle 8051 chips. It's a small 8-bit core with a minimum of instructions so the simulation functionality would be correspondingly simple. It is way harder to simulate a processor with a pipeline with interleaved instructions together with pipeline stalls etc. And most of the peripherials would also be very easy to simulate.

It is most definitely the ARM chips that requires lots of work to support - even more to support well.

I did implement a simulator for the majority of the Mega-88 (did not have use for all peripherial functionality), spending about two weekends. Having a IDE infrastructure that supports two architectures should mean it would be simple to get that infrastructure to have dialog boxes etc for more architectures (unless someone did something horrifyingly wrong).