You could consider simply ordering that latest XILINX CPLD board, which has on it a prototype area that is large enough to be useful. Sadly, it has short pins on the connectors, but that's not impossible to reckon with.

It has an XC2C256 CPLD and an XC9572 CPLD and the JTAG port so you can program it. That costs about $50 US.

You then add a 3.3volt 128Kx8 SRAM in which to store your samples and use an on-board oscillator, which you'll have to populate, say, with an oscillator of about 50 MHz and you cah then sample at 50 MHz, into shift-registers of 8-bit length, and shuffle the data into the SRAM. When you're finished with the sample, you send the data out a parallel I/O channel and process it in the PC. The reason I championed the USB approach is that the driver for Windows comes with it, and, from a Windows machine, you can move the data to a DOS box that runs your display program written in Borland 'C'. The DOS box, of course, could also host your parallel port interface, in which case you'd not need the Windows box or USB. You should comfortably be able to do that in about three days' time.

This is just another way to approach this, but it could work out very quickly. The board is made by DIGILENT <www.digilentinc.com> (They have nice pictures!) and is called an XC2XL board. I have one in front of me right now, and they're pretty decent. You should be able to get 100 MHz sampling with this arrangement, as it supports double-rate clocking in the XC2C256. Note that, while the XC9572 is 5-volt tolerant, it is a 3.3 volt part, and the XC2C256, while also a 3.3 volt part, is NOT 5-volt tolerant.

I'd suggest you build the thing 8 or 9 bits wide (8bits data, 1 bit sample-clock or qualifier). With a CPLD, you'll have lots of flexibility, but won't be as able to build flexible triggering into the arrangement as you could in an FPGA.

Your triggering requirements, for now, will probably be satisfied with the CPLD arrangement, and there's no end to what else you can do with the CPLD's.

There's no end to how you can do this. You can even build it with discrete logic an memory.

RE