Hi all,
Since the OP has vanished, as usual, we are left arguing about something else other than what OP had requested.

I really don't understand, why do people on this forum react like this.

I know OP had asked something that cannot be achieved very easily...some more reading/thinking has to be done before taking any decisions. All were right about this.

Now Tony Gelonese suggested a method which he has implemented and is working for a long time (according to his experience). "Working for a long Time" does NOT imply that it is the right solution. Even I agree to it.

When most of the members were saying that the method used by Tony Gelonese cannot be used...because CPUs of particular make (SiLabs chips) will burn....etc...etc... agreed to it....No issues on that.
http://www.8052.com/forum/read/169075

But in my post I mentioned particularly AT89C52. Whether this CPU allows this or not, I did not read the datasheet for this particular information. But even if this is so...(even for all other makes of CPUs..including SiLabs)...can't you put just an AND gate and get the job done?
Here is the scheme for your reference...And I do not think there is any problem with this scheme, if you implement a protocol such as MODBUS, or something similar; as used in RS485 networks.


Wouldn't this answer be a nice one:
Tony Gelonese's method might have worked OK in the field; but this is not the perfect solution. This solution will work on xxxx type of CPUs, but will NOT work on YYYY type of CPUs and the reason being that YYYY chips convert TxD/RxD into Strong pull ups when used as UARTS, but in XXXX chips this is not so, hence Tony Gelonese's method will work on XXXX chips.
If you want to implement this scheme on YYYY chips, then you can use the above schematic, but the protocol has to be such that there is NO Bus-contention (2 transmitters on the network at any given moment of time).

Perhaps, strong negative replies, to even silly questions, will have one major effect, the OP will never bother to come to 8052.com.