??? 06/17/12 05:01 Read: times |
#187746 - interesting Responding to: ???'s previous message |
Jim Granville said:
A pair of string of gates, with many capture FF's that you alternate between capture and calibrate will get you under 1ns in LSB resolution. Actually my first attempt was to use propagation delay for gates, but I didn't have the means to measure it. How do I make a string of gates in VHDL, is it something like a AND b AND c AND d AND e AND f ... etc? isn't propagation delay of gates not predictable, mainly temperature dependent and also depends on signal paths? Mahmood |