| ??? 05/09/09 07:34 Read: times |
#165185 - Still thinking of the DT8051 as 12-clocker Responding to: ???'s previous message |
Richard said:
That, actually, isn't the vendor's claim. The vendor claims that the core executes Dhrystone 2.1 compiled with undefined compiler and undefined parameters, and undefined resources, producing a rating of 8.1 MIPS. Here is where you deviate. The manufacturers claim is not 8.1 MIPS. The manufactuers claim is that the processor computes the Dhrystone benchmark 8.1 times faster than a 12-clocker when both runs the same binary and both runs at the same clock speed. Bad optimization will affect both processors. The only thing you will get from the manufacturers claim is that the DT8051 takes about 8 times less cycles in the benchmark. It was my claim that IF a 12-clocker produces 1MIPS for a specific benchmark, then the DT8051 produces 8.1 MIPS for the same benchmark. This of course also means that your "any 1-clocker" will not automagically do 12 MIPS, but most probably somewhere around 8 MIPS since the designer of your "any 1-clocker" would get into troubles with the same instructions. But I chose to show the output of a "perfect" 12-clocker and a "perfect" 1-clocker with the performance claimed by the manufactuer just to show that even then, your claim Richard said:
The SiLabs 'F12x's and Maxim/Dallas DS89c4x0's are certainly capable of more speed. In fact, any one-clocker at 25 MHz is as fast as that one at 300 MHz, at first glance. Not very impressive! would be to totally bogus. The manufacturer claims "The DT8051 is area optimized tiny soft core of a single-chip 8-bit embedded microcontroller based on World's fastest and most popular DP8051 core available for over 8 years." The DP8051 is a one-clocker. An improved DP8051 is not likely to suddenly become a 12-clocker. Some information about the older sibbling can be found in Kai Klaas link: http://www.dcd.pl/dcdpdf/an...ent_an.pdf The manufacturers claims that it benchmarks 1.48 times faster than a 12-clocker is also almost perfectly in the region you would expect from a 1-clocker, further adding to the probability that the DT8051 is a 1-clocker. Using whatever clock cycle count, the speed of the chip would increase with the clock frequency. If it is 8.1 times faster than a 12 clocker when running at the same clock frequency, then it is likely to run 81 times faster if run with 10 times higher clock frequency. And the manufactuer do claim the ability to run 130MHz in ASIC or 210MHz in FPGA. If it does the benchmark with 130/12 times the clock frequency, and 8.1 times higher efficiency, then it would be 8.1*210/12 = 88 times faster than a 12MHz 12-clocker for that specific benchmark. And if run at 210/12 times the clock frequency, then it would be 142 times faster. This should tell that whatever instruction cycle counts it needs, you will have big problems finding 25MHz one-clockers that can be 88 or 142 times faster than a 12MHz 12-clocker. Richard said:
But then step to 25MHz.
A 25MHz 12-clocker does 2.08 MIPS. A 25MHz 1-clocker does 25 MIPS. A 25MHz ASIC that is 8.1 times faster than a 12-clocker at the same clock frequency does 16.9 MIPS. Let's continue with the ASIC. Not a wise thing unless you can commit to 10K units or more. Even then, it's expensive, and you'd best not make any mistakes. Random noise irrelevant to the discussion if your "any 25MHz 1-clocker runs evenly with a 300MHz DT8051". And I did mention cost in my post. More to the point. your original post did not mention anything about cost, so I find it hard to believe that your claim was intended to mean cost and not speed. Richard said:
A 130MHz ASIC that is 8.1 times faster than a 12-clocker at the same clock frequency (i.e. being a 1.48-clocker) does 87.75 MIPS - way faster than your "any 25MHz one-clocker". That's probably true, and in custom ASIC, it can probably be made to run faster. Making it run faster in a custom ASIC would require you to rewrite the soft-core. The manufactuer has probably spent quite a lot of time already, on optimizing it. Richard said:
Richard said: In fact, any one-clocker at 25 MHz is as fast as that one at 300 MHz, at first glance. Keep in mind that the MIPS/MHz claim is based on nothing-but NOP's or other single-cycle instructions in the code-space. Did you fail to see the "at first glance"? Yes, I am keeping that in mind, but the manufacturers claim about 8.1x speedup was not based on any NOP sequences. Any "any 25MHz one-clocker" can not compete with another one-clocker that runs at 130MHz (ASIC) or 210MHz (FPGA). First glance should make that obvious. Only if you thought the DT8051 a 12-clocker would you need to push it to 300MHz to do the same number of NOP/s as a 25MHz 1-clocker. Did I fail to see "first glance"? The answer to that is in a previous post: Per said:
You then supplied something that very much looks like a claim by you: "In fact, any one-clocker at 25 MHz is as fast as that one at 300 MHz, at first glance." and Per said:
Now, instead of throwing around bad comments like "No ... it's 1 MIPS at 12 MHz. That's what 12-clocker means.", maybe you could explain exactly what meant by "first glance"? and Per said:
Was your "first glance" decision that any 25MHz one-clocker is the same speed as a 300 MHz ASIC the result of an initial test run done by you? Or by a test done by someone else? Or the result of a computation you did, based on any figures I haven't noticed on that web page or somewhere else? Richard said:
A 12-clocker would need to run at 300 MHz, to manage 25 MIPS.
But the DT8051 is not (!) a 12-clocker (or it wouldn't have been 8.1 times faster than the original 12-clocker). It is most probably a one-clocker, which means that it would do NOP instructions 12 times faster than a 12-clocker, and at the same speed as your "any one-clocker". This is where you lose me. First of all, there's no indication in any of the three separate datasheets that the core is a one-clocker, nor is there any indication of the specifics of their implementation/simulation environment. They could, in fact be "doing things" to the clock, and have built a 12-clocker, or they could have a one-clocker, or something in between. They do, after all, have a "ASIC" version that is claimed to be rated at 8.1 Dhrystone 2.1 MIPS, an ALTERA FPGA version, also claimed to be rated at 8.1 Dhrystone 2.1 MIPS, and a XILINX FPGA version again, claimed to be rated at 8.1 Dhrystone 2.1 MIPS, albeit at somewhat different clock speeds. 8.1 isn't an unreasonable number for a one-clocker operating with some "appropriate" instruction mix. What's used here is whatever Dhrystone 2.1 with their compiler, etc, produces. No, they do not claim any 8.1 Dhrystone 2.1 MIPS. They only claim that their core (no MIPS mentioned) is 8.1 times faster at the same clock speed as an original 12-clocker. Only when you adjust the clock frequency until the 12-clocker manages 1MIPS for the benchmark, would you be able to start thinking about 8.1 MIPS for the DT8051. But even that is a bit of an extrapolation from given facts. Richard said:
If you find hardware to run the soft-core at 300MHz without the need to add extra wait states, then it would do 202.5 MIPS - way more than any 25MHz 8051 processors ever released - your 25MHz processors would need to do 8 instructions/clock cycle to keep up. Perhaps, but at what cost? The vendor provides no information about the actual device in which their implementation/simulation was performed, nor do they indicate what other resources were consumed. In an FPGA, based on recent quotes from AVNET, likely to cost 10x-1000x as much as a commercially available MCU, once resource requirements for features that justify using FPGA are added to the computation. This debate isn't about cost. This is about your claim that the DT8051 would require 300MHz to match the speed of "any 25MHz one-clocker". And when I did talk about the speed issue in an earlier post, you responded with: Richard said:
No ... it's 1 MIPS at 12 MHz. That's what 12-clocker means. and Richard said:
I imagine they use the 12-clock scheme to maintain compatibility with "standard" peripherals, e.g. timers/UART, etc. and Richard said:
They never do get around to explaining the relationship between their 300 [Sic!] MHz claim and their 8.1x speed claim. Are they hiding something? and Richard said:
Surely you know that's not MY claim. In fact, it's not even THEIR claim. You're the only one who's made that assertion and Richard said:
What I pointed out, I thought, was that the mfg's claims don't match their own claims. I don't know why you think you should add even more unsubstantiated claims. The only thing I have said in all of my posts are: - for a specific sequence of instructions, the soft-core is 8.1 times faster than a 12-clocker - everything indicates that the DT8051 is a 1-clocker (benchmark speeds, previous generation, ...) - when compared to other 1-clockers at the same clock speed, you would have to look at the individual instructions to figure out if the winner would be the DT8051 or the other 1-clocker. - with a DT8051 running at significantly higher clock speeds than "any 1-clocker", that other 1-clocker would be spanked. No confusion involved. No claim is unreasonable. All claims has a lot of support in the information available on their site. And they are all in contradiction to your claim: Richard said:
The SiLabs 'F12x's and Maxim/Dallas DS89c4x0's are certainly capable of more speed. In fact, any one-clocker at 25 MHz is as fast as that one at 300 MHz, at first glance. Not very impressive! All the extra text and examples are there to try to get you to finally understand that your "first glance" was totally wrong. This could have been established immediately, if you had spent some time thinking directly after my first post about this issue, where I started with: "I probably misunderstood something but:", giving you a way out by asking you to reformulate your claims. I also tried a "But a bit simplified:", just to show how quickly it could be established that your statement was about a factor 10 off, compared to available facts. That should have been enough for you to take a closer look at available information, and decide to drop your 25MHz to 300MHz comparison. Richard said:
My complaint has not been about the claim of performance, however un-persuasive, but about the inadequacy of the information provided, even in their datasheets. There's no real way to assess their device based on their marketing drivel, and that's all they've provided so far. So why did you not immediately say that your claim about thd DT8051 needing 300MHz to match was incorrect? Richard said:
The problem here, is that you made the assumption that the maximum possible speed of the soft-core was 8.1 times faster than a 12 MHz 12-clocker. But the manufacturers claim was specifically "8.1 times faster than standard 80C51 at the same frequency". The speed of the DT8051 will not stay still, but will climb with increased clock frequency.
The uneven figure 8.1 on the other hand is the result of running a benchmark containing a mix of instructions, where not all instructions is exactly 12 times faster than the 12-clocker. Some take one clock. Some take two clocks. Some may take even more clocks. This can so clearly be seen if you view Jan Waclawek's excellent link: http://www.efton.sk/51comp/51comp.htm If 50% of the instructions takes one clock, and 50% takes two clocks, then you get a processor averaging 1.5 clocks/instruction, which is a processor that is about 8x faster than the original 8051. This sounds like a very good fit for the manufacturers claims regarding the DT8051. It depends entirely on the instruction mix, doesn't it? The uneven figure 8.1 (i.e. 1.48 clocks/instruction] does depend on the instruction mix, as I have several times mentioned. But the factor will almost always be inside the 6x to 12x range. I haven't seen the full set of instructions, so it is possible that you may find a specific instruction making it only be 4x faster than the standard 12-clocker. But then again, other 1-clockers do have instructions requiring extra clock cycles. Richard said:
So the end result is: Select any 25 MHz one-clocker you can find on the market. Run it against the DT8051 at 25 MHz, and you would need to read the fine print to figure out which one will be faster. And which one is faster may depend a lot on the mix of instructions. Pump up the clock frequency of the DT8051, and your 25 MHz one-clockers would need to be super-scalar, i.e. doing more than one instruction / clock cycle, to keep up. That's exactly what I believe, i.e. their claim should be based on the same benchmark as used by the typical MCU maker, e.g. the code-space filled with NOP's, which it can execute with maximal brevity. But if the above is true, then a DT8051 at 300MHz would in the neighbourhood of 12 times faster than a 1-clocker at 25MHz. The sibling they say they improved on claim 2 clocks for a MUL AB, so a 300MHz DP8051 would be 12 times faster than any other 1-clocker that needs 2 clocks for MUL AB. That would make it likely that the improved DT8051 needs no more than 2 clocks for the MUL AB. Doesn't the Silabs chip you mentioned need 4 clocks for a MUL AB? Then you may find that it doesn't take 300MHz, but just 12.5MHz for the DT8051 to match your Silabs chip in a benchmark just containing MUL AB instructions. Richard said:
Do you now see the problem with your final claim? I don't see a problem, since I've clearly pointed out that it's based on the popular MIPS/MHz claims from some one-clocker manufacturers. That is the problem. Pointing out an error several times don't make it less erroneous. Your claim "that it's based on the popular MIPS/MHz" is wrong, since the manufactuers speed improvement claism was not based on MIPS/MHz but on the time needed to process a Dhrystone benchmark, compared to a 12-clocker. And your comparative figure of 300MHz was based on the assumption that a 1-clocker at 25MHz does the same number of NOP as a 12-clocker at 300MHz, while the DT8051 isn't a 12-clocker. What is important to notice on the other hand, is that even if a DT8051 can manage a quite impressive MIPS count, it may not be the most cost-effective way to get a fast microcontroller. Because of cost, it might be better to jump to a different architecture and select a fast ARM9 or ARM11 or any of the Freescale MPC processors instead. Of course unless the free gates in a FPGA can allow you to solve a problem a standard microcontroller can't do. There are times when "solving a problem" is more important than "finding the cheapest solution". On that we can surely agree, though I'd be careful about the 16- and 32-bitters, as they often only allow one to do 8-bit things VERY slowly, relative to an 8-bitter. If you're doing 8-bit things, it's useful to have an 8-bit-oriented instruction set. Richard said:
So in the end:
Richard said:
What I pointed out, I thought, was that the mfg's claims don't match their own claims. I don't know why you think you should add even more unsubstantiated claims. I have no interest in adding any unsubstantiated claims. Just trying to stop one that seems to have been caused by a reading error. Didn't you stop to think about why the claims didn't seem to add up - that maybe the claims did add up but you missed an important clue somewhere? I looked at all that and simply categorized the whole lot as typical "marketing drivel" designed to confuse rather than to inform. You did a bit more. You did imply that the DT8051 was slow as hell, since your speed claim required it to be downgraded from a 1-clocker to a 12-clocker. Richard said:
Everyone is wrong now and then. The important thing is to always be ready to reevaluate known truths when new information arrives. I don't believe there have been any new truths introduced, aside, perhaps, from the apparent fact that these so-called specifications are actually just the typical marketing drivel that we're routinely fed. I'm a seasoned man, and have been wrong enough times, not always happily, surely enough that it doesn't upset me. If you want truths, you have to obtain the compiled binaries for their implementation and compilation of their Dhrystone 2.1 benchmark, so you can run it on the MCU of your choice. Without that, any comparison is, at best, a guess. But surely not a guess with an error margin on the factor of 12x? |
