then your synthesis tool MIGHT digest it properly.

Neither XILINX nor ALTERA like it, but CYPRESS' VHDL (WARP) seemed to handle it properly. Unfortunately, CYPRESS doesn't build programmable logic any longer.

BUFFER is an output with feedback, and since that is really only physically done in CPLD's, most synthesis tools reject it, requiring instead that you have a "dummy" SIGNAL containing the correct value on the RHS of your assignment.

RE