It's a bit confusing, when looking at your four schemes because they seem to fullfill different and contrary needs. I thought, you need a circuit by which you can turn-on the LP2992 by pushing a button and turn-off the LP2992 by the micro itself after being invoked by pushing the button again. But your last scheme doesn't provide this:



The first disadvantage of your circuit is, that immediately after connecting the battery to VBAT the /FORCEOFF input is low, forcing the ENABLE output to go high. This is unsuited and should be avoided, because the conneting of battery to VBAT is a procedure causing lots of contact bouncings.

A better methode would be to totally disable the ENABLE output during the power-on-reset (via R15 and C21) of CD4093 and to only allow startings after the end of this power-on-reset, means, that button pressings even during the power-on-reset will not cause the LP2992 to turn-on.

The next mistake of your circuit is, that pushing the button will immediately reset the flip-flop and cause the ENABLE output to go low and by this the LP2992 to turn-off. So, the micro has no chance to retard the turn-off during EEPROM writings.

More, further button pressings will not change the states anymore. So, once the LP2992 was turned-off you can neither turn it on nor turn it off again. The circuit is dead and can only be reanimated again by momentarily disconnecting the battery from VBAT.


Your third scheme is much better than your last scheme:



Here, the button is connected to the upper NAND-gate, which will work much better.

But this scheme shows also some disadvantages:

- Immediately after connecting the battery, the ENABLE output can go high for a brief period, because C12 is unscharged!

- The debouncing time constant of switch (10k, 10n) of about 40µsec is way to small. Silicon rubber buttons can show huge bounce times, especially the older ones, when the rubber became baggy. For this kind of switch a debouncing time of at least 100msec is suited. Also, as the flip-flop does not need any debouncing, but only the micro (ONDETECT line), provide the debouncing by software and omit the RC-debouncer at the switch.

- The switch input can override each tempt of turning-off the LP2992. Even the power-on-reset can be defeated by accidentally pressing the button. This is highly unsuited and will be the cause of future trouble.

This scheme here, which I already published some days ago, avoids all these disadvantages:



How does it work?

Immediately after connecting the battery to Vbat, the 470n cap is uncharged and forces not only the reset input of flip-flop low, but also the input of an additional NAND-gate, which guarantees, that the ENABLE line ("EN") is low during the entire power-on-reset, even if the button is eroneously pressed. Only, after the cap is so much charged, that the positive going threshold voltage of CD4093 is exceeded, then a pressed button can turn-on the LP2992.

The two 1k5 resistors are to protect the inputs of CD4093, if Vbat is accidentally shorted to GND during battery handlings. The time constant of power-on-reset (470k, 470n) must be long enough, to keep the cap uncharged during the entire connecting "hassle".

So, after a standard connecting of battery to Vbat (means, without keeping the button eroneously pressed), the flip-flop is reseted, the "EN" output is low and the LP2992 is turned-off.

When now pressing the button, the flip-flop becomes set, the "EN" output goes high and the LP2992 is turned-on. The switch is properly debounced by the flip-flop itself. No additional components are needed.

When again pressing the button, in order to turn-off the LP2992, the flip-flop will not change its state. But the micro will notice it via the "SW-DETECT" line. Now, a software debouncing should take place, which demands the "SW-DETECT" line to be low for at least 100msec, before to be high again for another 100msec at least. Then, the micro must activate the "Soft-off" line, by which the 470n cap becomes quickly discharged. This immediately forces this earlier mentioned "gating" NAND-gate to be blocked and the flip-flop to be reseted. As consequence the "EN" output reliably goes low and stays low as long as the cap is discharged.

The 100R resistor is to limit the discharge current. So, even a 2N3904 could be used for the discharging. But to allow a rather high discharge current to flow a rather high base current must flow too, so that a MOSFET would be the better choice. A BS170, 2N7000 or a heavier variant may be suited.

Kai