??? 05/02/07 11:52 Read: times |
#138456 - The circuit shown,,,, Responding to: ???'s previous message |
The circuit I showed has been implemented in a number of successful medium volume products. It is a flip-flop albeit a non-buffered cross coupled circuit.
There are a couple of considerations in the design to take note of. First of all the small cap on one of the N-FET gates in the cross coupled latch is there to help ensure the initial state when first installing the battery. Next the idea here is that the ON switch is on the side of the cross coupled latch that forces the ON state and provides a direct override to whatever may be happening on the other leg of the latch. Lastly the dual diode that permits the ON switch to play double duty as also an MCU input peforms the important function of isolating the latch side of the circuit at the higher voltage from the possibly lower voltage MCU I/O pin. Make sure the forward voltage drop of the dual diode is small enough as to not compromise the VIL at he MCU input. This circuit does place a 470K ohm load on your battery when the unit is in the OFF state (i.e. about 19 uA when the battery is fully charged at 9 volts). If that is too much current drain on the battery then this may not be the circuit for you. A CMOS logic chip flip-flop will likely be lower current draw but often ends up using more space and BOM cost. Note that it is not specifically necessary to use a clocked type flip-flop when you involve the MCU in the "time to turn off" decision. If so it is possible to create the latch circuit with a pair of CMOS NAND gates. - Michael Karas |