Its complaining about ripple and or gated clocks, ripple clocks are created when the output of one register feeds into the clock of a second which you sometimes find in asyncronous counters and so on, there is nothing wrong with using ripple clocks as long as you are not using the states of the registers to drive external logic because of the propagation delays caused.
Gated clocks are caused when combinational logic is used as the clock on a register, for example using an address line as a strobe in a processor port, which is ok as long as you only use one input to the combinational logic as the clock and you only use one level of logic ,otherwise hazards are likely to be created.