??? 04/15/07 22:40 Read: times |
#137303 - warnings sample Responding to: ???'s previous message |
The first warning is legitmate because I'm still working on the tri_address for i need to think how to do a triangle waveform. but the rest I have no clue.
Warning (10541): VHDL Signal Declaration warning at funcgen.vhd(40): used implicit default value for signal "tri_address" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations. Warning (10631): VHDL Process Statement warning at kb_encoder.vhd(172): inferring latch(es) for signal or variable "kbrtn_encod", which holds its previous value in one or more paths through the process Warning: Removed always-enabled tri-state buffer ROM:ROM1|lpm_rom:lpm_rom_component|otri[0] feeding logic, open-drain buffer, or output pin Warning: Removed always-enabled tri-state buffer ROM:ROM1|lpm_rom:lpm_rom_component|otri[1] feeding logic, open-drain buffer, or output pin Warning: Removed always-enabled tri-state buffer ROM:ROM1|lpm_rom:lpm_rom_component|otri[2] feeding logic, open-drain buffer, or output pin Warning: Removed always-enabled tri-state buffer ROM:ROM1|lpm_rom:lpm_rom_component|otri[3] feeding logic, open-drain buffer, or output pin Warning: Removed always-enabled tri-state buffer ROM:ROM1|lpm_rom:lpm_rom_component|otri[4] feeding logic, open-drain buffer, or output pin Warning: Removed always-enabled tri-state buffer ROM:ROM1|lpm_rom:lpm_rom_component|otri[5] feeding logic, open-drain buffer, or output pin Warning: Removed always-enabled tri-state buffer ROM:ROM1|lpm_rom:lpm_rom_component|otri[6] feeding logic, open-drain buffer, or output pin Warning: Removed always-enabled tri-state buffer ROM:ROM1|lpm_rom:lpm_rom_component|otri[7] feeding logic, open-drain buffer, or output pin Warning: Latch kb_encoder:KEY_BOARD|kbrtn_encod[0] has unsafe behavior Warning: Ports D and ENA on the latch are fed by the same signal kb_rtrn[2] Warning: Latch kb_encoder:KEY_BOARD|kbrtn_encod[1] has unsafe behavior Warning: Ports D and ENA on the latch are fed by the same signal kb_rtrn[1] Warning: Timing Analysis is analyzing one or more combinational loops as latches Warning: Node "kb_encoder:KEY_BOARD|kbrtn_encod[0]" is a latch Warning: Node "kb_encoder:KEY_BOARD|kbrtn_encod[1]" is a latch Warning: Found pins functioning as undefined clocks and/or memory enables Info: Assuming node "f_clk" is an undefined clock Info: Assuming node "kb_rtrn[3]" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin. Info: Assuming node "kb_rtrn[2]" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin. Info: Assuming node "kb_rtrn[1]" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin. Info: Assuming node "kb_rtrn[0]" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin. Warning: Found 1 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew |