Thanks , I would be appreciated.


I would like to put all the logic into something that costs lower than $10.This is the reason I chose the MAX7000 family.


Yes, But I don't know how much logic (or cells or arrays or !) would my design need. This is the most reason I am interested to ask someone who have experience in this field.

This project Have to finish in a limited Time (in no more than 15 days).Do you think that a PLD newbie like me who knows some basics of the VHDL and Logic could arrange a simple circuit like this in about a week :

If (Input_X==1 && Input_Y =1 )
 For (24bit_counter=1; 24bit_counter<256,000; 24bit_counter++)
 {
  Read 8 bit data from ADC
  latch 24bit_counter to the SRAM Address
  Store Data to the Sram
  Increment the 24 Bit Counter
 }

Plus an state machine which accepts some command over RS232 and reads SRAM back to the RS232.

If you think this would need more time I'll Plan to do the project in two phases. In the first phase I'll use a 16 MIPS MCU to do the control and then I'll plan for a PLD device.


I'll look under the Altera Website to see what I find.


If you think It could be done in less than 7-9 days , I'll try to draw a simple Schematic (not a logic equivalent) soon.

Farshid