Sigma delta converters are slow but its a trade off between speed/ cost/size of logic in the end, you could implement a flash converter but it would be HUGE in terms of logic resources.
Reading the application note i cannot see any mention of the actual sampling rate that they achieved but I could have a look and see what kind of figures you get if you stick it though a simulattion.
As far as the counters are concerend a PAL would be to small to hold all the logic you require I would recommend going to a low end fpga such as the altera acex, speed is certainly not a problem, spi interface again is pretty straight forward in fact i was at a seminar the other week about using spi flash memories with PLDs so I am sure i can help there.If you drew a circuit diagram of what you want in the PLD it would be a good start but there is nothing in your last post which presents any problems.