| ??? 12/10/11 10:20 Read: times |
#185058 - impressive Responding to: ???'s previous message |
David Prentice said:
Some examples: 8051 AT89LPxxxx STC12C5Axx ADD A,Rn 12 1 1 ADD A,direct 12 2 1 DEC direct 12 2 1 MUL AB 48 2 4 ORL direct,#data 24 3 2 LCALL addr16 24 4 2 I presume that SiLabs are also not an automatic 12 to 1 correspondence. I'm impressed with those direct instructions taking one cycle less than their byte size on the STC. That would require a 16 bit data path to code memory or some DDR-scheme I guess. On the SiLabs parts the execution speed is limited by the byte fetches for the opcode and most instructions takes as many cycles as they have bytes. Maarten |
