??? 12/08/11 17:02 Read: times |
#185035 - Looks good, so far, eh? Responding to: ???'s previous message |
David Prentice said:
These single-clockers average out at about 6x a regular 8051. i.e. a lot of 12cycle ops take 2 cycles on the new core. Do you mean that the part takes two cycles to execute a "single-cycle" instruction, or do you mean that many instructions are "two-cycle" instructions anyway? The best feature is the double buffered TX, RX on the SPI, so your SPI slave can run without any gaps. This seems to be a good feature. Have you pressed the rate limit on the SPI? I wonder how fast it can actually run. The SPI shares its IRQ with the UART, which seems a bit pointless since it could have a vector of its own.
The PWM and push-pull outputs are nothing better than any other 8-bit controller. The 89LP51RD2 looks quite attractive. If it is limited to 20 or 24MHz, it will be slower than the 35MHz Chinese STC12C5AxxS2 chips. It appears to have similar features. Their 'singe-clock' feature means several 12 cycle ops are 3 cycles. Has anyone here had a play with these STC chips? At least they are available off the shelf. (I am waiting for some to arrive from China). Atmel is good at vapourware. Indeed! David. |