We have been in contact with Silabs Europe. They have cautioned me against using the inbuilt POR. In built POR has no supervisor while the chip starts up, we were informed. (Even though the manual says the reet pin will be held low till VDD reaches VRST ie 2.7V, in the block diagram, they have separated VDD monitor and POR. We need to refer to the block diagram and not the confusing text below that). The VDD rise time required for Silabs is 1ms, and if the rise time is more than that, they recommend

In your case VDD ramp time is more than 1ms so I recommend:

- Use an external capacitor tied between /RST and GND to delay /RST rising
until VDD is stable.

- Use an external VDD monitor circuit connected to /RST pin.

I have been checking the chip with slow rising VDD (Variable power supply), with your method - no capacitor. And It seems to be working well without issues. I have already inserted MAX1232 in the circuit. I need to check it in the field. Power supply side, I am trying to build a crude switch off thing using a zener and 2 transistors.

Let me thank everybody once again for their comments and inputs.