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???
06/10/08 06:36
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#155658 - If there's nothing pressing ...
Responding to: ???'s previous message
A nice leisurely sequential sampling of the switches is probably appropriate if one has little else to do. However, if these are front-panel switches, they're not a keypad, and probably don't see so much action.

Again, we really don't know much about what the nature of these switches is, i.e. are they momentary or static, are they pressed multiple times a second, or set every other year?

If they're static, as the switches on the front-panels I used were, i.e. they were used to set registered values for use in hardware debugging, and took DMA on the system bus. They had to be bounce-free, so I'd use a cap after a series resistor from the pull-up/pull-down on the SPDT switch.

The 4021 is an 8-bit serial-in/serial out register with a clock and a control to select whether the flipflops are loaded serially or in parallel. (see http://www.fairchildsemi.com/ds/CD/CD4021BC.pdf )

When the parallel-load function is selected, the data is loaded asynchronously with the clock and, once the parallel load control is negated, the data is shifted out synchronously with the clock.

If he samples a change on the switch array, that is bouncing, there's no guarantee that he'll "see" it, as it could be in either state or anywhere in between when it's sampled. If he is using a typical 12 MHz part, one that divides the clock by 12, he's likely to be unable to clock the part faster than 150 kHz, since he has to allow for propagation from bit-to-bit and between IC's, and, of course, he has to do something with the bits as they arrive. It seems to me that, sampling at a relatively low rate, and having to shift all 24 bits at one time allows for the possibility that he'll miss a bounce, hence, he could miss a momentary closure if he's not very careful and very much aware of the bounce characteristics of his switches.

Since I don't know how fast his MCU is running, and since I don't know how he goes about clocking his PISO (parallel-in, serial-out) register, and since I don't know how he goes about detecting that his inputs are stabile, I don't know whether he's likely to miss a switch closure ... probably not, but who knows?

I've never used one of these chips, but I'm used to seeing larger input capacitances on 4000-series parts than this one seems to have. With < 10 pf of input capacitance, he'll surely need load capacitors at the inputs.

RE


List of 42 messages in thread
TopicAuthorDate
Input Protection            01/01/70 00:00      
   I use a series resistor            01/01/70 00:00      
      I like clamps ...            01/01/70 00:00      
         I would not use a \'S\' chip            01/01/70 00:00      
            It's just an array of schottky diodes, Erik            01/01/70 00:00      
               Resistors and cap            01/01/70 00:00      
                  why the slowpoke            01/01/70 00:00      
                     the technology will still work in this case            01/01/70 00:00      
                        stupid boss            01/01/70 00:00      
                           ... or stupid Erik, maybe?            01/01/70 00:00      
                              I did NOT say "stupid engineer"            01/01/70 00:00      
                                 now, don't get me wrong here ...            01/01/70 00:00      
                                    a typical result of a stupid boss            01/01/70 00:00      
               well the 74S had me since ....            01/01/70 00:00      
                  Yes, it indicates the process technology            01/01/70 00:00      
                     HEF4021            01/01/70 00:00      
                        Anyhow the major setback using 40xx            01/01/70 00:00      
                           This is entirely wrong!            01/01/70 00:00      
                        No, not better, but different            01/01/70 00:00      
      Adding another cap            01/01/70 00:00      
         I do not think so, but it will wear the switch            01/01/70 00:00      
         Immunity against what?            01/01/70 00:00      
   No, just a business decision ...            01/01/70 00:00      
      Uhm...            01/01/70 00:00      
         all 40xx chips are based on the same technology ..            01/01/70 00:00      
         if the RC before the PISO doesn't do it ...            01/01/70 00:00      
            Values            01/01/70 00:00      
               I do not know why ...            01/01/70 00:00      
                  Values..            01/01/70 00:00      
                     like this            01/01/70 00:00      
                     Caps and RF immunity            01/01/70 00:00      
                        true - and not            01/01/70 00:00      
                           Expensive capacitors?            01/01/70 00:00      
            BALDERDASH            01/01/70 00:00      
               the PISO register is loaded only once ...            01/01/70 00:00      
                  I hav no desire to look up 40xx chips, but ..            01/01/70 00:00      
                     If there's nothing pressing ...            01/01/70 00:00      
                        Setup            01/01/70 00:00      
                           overdoing it            01/01/70 00:00      
                           That just might be adeuqate ...            01/01/70 00:00      
                              Switches            01/01/70 00:00      
                                 IF you choose the right rate ... and IF you check            01/01/70 00:00      

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