??? 06/10/08 00:22 Read: times |
#155648 - I hav no desire to look up 40xx chips, but .. Responding to: ???'s previous message |
Unless he uses a very slow process (possible, but not verified so far), and repeats the sampling sequence multiple times he can easily capture a "wrong" state during the bounce (typically 20 ms).
... his shift register MUST be latch and shift if there is no latch the chip is wrong, if there is, the stuff Richard posts is wrong. if the SR is latched each "bounce time" there is no difference (in the respect of bounce) between reading from a Shift register and direct pin input. Erik |