I'll try to bend it in neon and cut it in cardboard in attempt to get through the fog that evidently cloud Darrens brain

gate output      interconnection   gate input
 _________
-_________------------------------------
                                      |
                                    __|__
                                    _____
                                      |
                                     gnd

when the output goes high the capacitor charges i.e. some power is dissapated in the output resistance (mr Ohm, Mr Ampere, Mr Volt, Mr Watt), If The output stay high no power is dissapated in the output resistance (mr Ohm, Mr Ampere, Mr Volt, Mr Watt), same when the gate goes or stay low.

So as power is dissapated when the output goes but none when it stay it follows that the more often the output goes the more power is dissapated. A higher frequency of pulses, square waves, even sinusodials (not that that is applicable to logic OOPS logic and Darren, am I off my rocker?) is what I have tried to explain at a level Darren may understand by using "the more often the output goes" since he will not believe me if I say higher frequency.

Erik