The following pictures are from an application note from Texas Instruments.

The first picture shows, how 74HCMOS - as an example for an advanced CMOS technology - and good old 74LSTTL consume power versus frequency:




You can see, that 74LSTTL, due to the consuming of idle current, shows a nearly constant power consumption versus frequency. Only at rather high frequencies current consumption increases due to the stray capacitance to be driven on die and at external loads.
With the 74HCMOS supply current only flows due to the stray capacitance to be driven, so, a static idle current does not flow. The result is a linear rise of power consumption versus frequency curve.

In a typical digital circuit only a fraction of gates are switching at the clock frequency "fs" of micro. Assuming that the individual gate switching frequencies are distributed between zero and "fs" according to this Gaussian curve




an enormous amount of power can be saved by using 74HCMOS instead of 74LSTTL, like shown in this picture:




Take note, the consumed power is the area under the according curve! So, you can see, that the absence of any static power consumption with CMOS-chips made the chip industry finally migrate to CMOS. Another reason was integration density: CMOS consumes much less die area than bipolar circuitry.

Kai