Hi Kiran,



The standard 8051 has a feature, which supports the generation of random numbers similar to the scheme Erik already mentioned (a fast running oscillator, read out at random instants): The 8051 can have the timers/counters be gated by the /INT input, will say, the timer can be set into a mode, where it counts the internal clock (crystal clock / 12) only when one of the /INT inputs is brought high. So, if you connect a noise generator to the /INT0 input, which sets this input randomly low and high, then the counter register will show random contents.

More, if you use the auto reload feature of the standard 8051 you can even directly generate the random numbers 1 to 37, which Roberto is needing.

The following scheme shows a noise generator, which could be used for this purpose:



Usually, noise generators use the noise of a reverse biased zener diode. Unfortunately, these noise generators need a supply voltage, which is very clean and is way higher than 5V. To avoid the interference of an additional switcher or a charge pump, I use a different source for the noise here, the thermal noise of a resistor. By this, the circuit doesn't need a high supply voltage, but can run at 5V.

As the scheme shows, much filtering is needed to remove interference from Vcc, which can be digital noise from switchings and the crystal oscillator. The two chokes are soft ferrite beads presenting a high impedance in the 100MHz range, to compensate for the parasitic inductance of the filtering caps.

The 10M and 4M7 not only produce the noise, but also bias the input of first TLC271 at about 1.4V. This is the DC level finally reaching the output of this noise generator.

Each TLC271 has a gain of 101, resulting in a total gain of about 10200. The upper bandwidth is about 20kHz, as a result of the finite speed of TLC271, which are running in the high bias mode. The lower bandwidth is defined by the two 100n caps, which is about 2.5kHz. So, the DC gain is 1, eliminiating all trouble from offset voltages of OPamps.

High pass filtering of noise is very important here. Without a high corner frequency, low fequency noise could block the output of noise generator, causing it to stay a rather long period logic high or low. So, two or more subsequent readings of the counter register could show the same result. With a corner frequency of 2.5kHz the counter register should not be read earlier than about every 1msec. Better, to wait even longer, to be sure, that the counter was clocked in the meantime.

Of course, I would prefer to reduce this latency even further. But this would mean to shift the noise bandwidth to higher frequencies, which isn't possible with these low cost OPamps.

As with all high gain OPamp circuits, the layout of this circuit is critical:
Keep the signal ground of this circuit well isolated from the signal ground of any other circuitry, especially the microcontroller circuit. Use a local ground plane for this circuit and connect it to the signal ground of rest circuitry only at a single point. Move the 10M and 4M7 resistors and corresponding circuitry far away from this point, so that they see a very quiet signal ground. Shield the whole circuit and connect the shield to this single point. I can show you a suited layout, if you want.

What is this circuit doing, finally?
At the output a DC level of about 1.4V can be seen. This level is right between the maximum input low voltage of 0.9V and the minimum input high voltage of 1.9V of /INT0 input (an AT89S52 assumed here). The noise at the output of this noise generator is about 2Vss, causing the /INT0 input randomly toggling between low and high.

Eventually, the 100k resistor of second TLC271 might be adjusted slightly, to allow the output a full output voltage swing without going into saturation. Eventually, a comparator could be added, with a threshold voltage of 1.4V and a hysteresis of let's say 20...30mV. But I don't think, that this is really needed.

Kai Klaas