| ??? 07/25/09 13:37 Read: times |
#167882 - You can use a monitor or ICE or whatever Responding to: ???'s previous message |
Richard Erlacher said:
The clear advantage of this particular approach was that the target code ran on the target system with a core operating in the target environment at the target core's rate. That made it easy to monitor hardware/firmware interactions with a logic analyzer in real-time. I don't know what sort of "debug hardware" can give this sort of support for a developer. JTAG operates at ~100kHz max. Even a classic 805x is too fast to be monitored in real time by such a feature. Yes, you can look at registers, even memory or I/O features, but I don't see how 100 kHz JTAG can keep up with repeated cycles through that process when the process is at 1 MHz. It's nice to be able to look at the state of the target once it's stopped, but traces have to stop in order to trace. That's a fact we couldn't avoid in the '70's either. You can always use an ICE if that is what you want. But even with your Ultramon you are going to do nothing more than set a few break-points. You may choose to do some conditional processing at the breakpoint whether in 8051 or by a PC controlling JTAG. Either way you will be taking time and resources. Another approach is to output debug information to some external port. Again you are detracting from the "naked" system. As I have stated before, you need to use the tools that you are happiest with. You like one method but you should be aware of other techniques even if you do not choose to use them yourself. Incidentally, I have just downloaded Ultramon51 and it looks relatively straightforward to reverse-engineer. I am surprised that you have not done this for yourself 15 years ago. In the days of UV eeproms the development cycle was a nightmare, and a ROM-emulator essential. But nowadays you can use "proper" assemblers, compilers etc with a flash based chip AND have a realistic development cycle. David. |
