??? 03/13/06 13:51 Modified: 03/13/06 14:00 Read: times |
#112056 - Answers Responding to: ???'s previous message |
Prahlad said:
1. In your original schematic the 64Hz square wave output from CD4060 is connected like this..
CD4060 --->39k --->47uF Where as in your layouts that you posted in recent post shows other way ie. Oscillator --> 47uF ---> 39k Whats the correct way or it doesn't matter either ways correct? It doesn't matter, which of the components comes first, when they are connected in series. I have chosen the cap to be first only, to be able to keep the current loop through 47µ cap, 39k and 3k9 resistors minimal. Prahlad said:
2. You had suggested filtering each and every supply signal using a 100E Resustor 47uF aluminum electrolytic and 100nF. But in your layout there are two resistors. I have accordingly split that 100E into two 47E resistors is it OK? Please have a look at the schematic: You will see, that I recommended also a choke to be in series to 100R resistor. The choke, at best a 6-hole-choke, shows an impedance of up to 1000 Ohm in the critical range of frequencies, which improves the filter dampening by a factor of ten!! Only by the help of this choke the noisy ground return currents of the oscillator can be kept minimal. Otherwise they would introduce ground noise in the analog section. Prahlad said:
3. Is the placement of oscillator section correct or it needs to be moved upwards towards the power input connector? I thought this because moving it upward will reduce the path length of noisy digital section ground returns which flows through analog section while returning to connector. Am i correct? There's no longer any relevant noisy digital ground return current from oscillator! This because of the power supply filter at CD4060!! Remember Kirchhoff's laws: The same current, which flows through the 100R resistor and the 6-hole-choke flows back via the bridge connecting the digital and analog ground planes. But as the 100R resistor and the 6-hole-choke present a very high impedance for the digital noise, only a very small digital noise current is flowing. Only relevant current that flows through the choke is the DC component of supply current of CD4060! Nearly all the high frequency components of supply current is supplied by the decoupling caps and only about 1/1000 flows back to the analog ground plane. That is how power supply filtering works! But to obtain optimum results, the ground pin of 100µF decoupling cap must have shortest connection to the bridge connecting the analog and digital ground plane, as I demonstrated this in my example: Only then, also the clock signal of oscillator running to the analog section is no longer contaminated by high frequency noise!! You can even furtherly minimize the digital ground return currents flowing across the analog section, by connecting another decoupling cap from supply voltage to ground directly at the bridge, but on analog section. What you get then is a pi-filter configuration, which shows the very best performance. You can do the same with the clock signal too: Feed the clock signal over the gap via a resistor and have directly at the gap, but on the analog section, a cap connected to ground. Then, also for the clock signal you have this extremely helpful pi-filter configuration. What ever traverses the gap must be filtered, at best by a pi-filter. By this technique, which I call the local-grounds-technique, you can nearly totally isolate even the most noisy circuits from the most sensible sections. Prahlad said:
4. I remember some time back you had suggested that Analog and Digtial ground planes should meet at one and only one point. But in case of layout you posted the two planes are joined at two places ie. top layer as well as bottom layer. This is joining them at only one place! Especially if you connect the both planes by many vias, which should always be done, when having a ground plane on top and bottom layer. I did not draw them for simplicity, but you should do that yet, distributed over the whole board. Kai |