A Simulator will count your cycles for you. And get it correctly.

As far as I know, there are no 8051s that use caches. Each 8051 instruction is documented for its behaviour.

Most bottlenecks are due to frequent calls of short pieces of code. You simply hand-craft these sequences while leaving the other 99.5% of code in HLL. Let's face it, the 8051 is simple to write ASM for.

I am lazy so I get the Simulator to do the cycle counting. I sometimes use an 8051 timer or a Logic Analyser.

All the same, most efficiency is gained by improvements in the algorithm rather than the low level ASM code. As Per has noted, the actual translation of P1.4 = 0 is going to be the same.

Of course, you will get the best performance from a perfectly designed ASM program. Very few applications are that time critical. If your clients have few boards, your development time is very significant.

I am sure that you can knock out perfect ASM faster and more reliably than others can use a HLL. This is due to your experience. At your age, I expect that PDIP-40 8051 chips will see you through. A young student would better spend her time learning how to use MCUs and tools that have a realistic future.

Incidentally, when you meet your bus or jealous husband, will your clients really be able to maintain your ASM code? Or even find another expert?

David.