??? 10/27/11 09:55 Read: times |
#184388 - A message from the OP. Responding to: ???'s previous message |
Richard Erlacher said:
Keep in mind that this matter arose out of an honest desire on the part of the O/P to evaluate a compiler's suitability for a specific task.
RE As the Original Poster, I asked whether there was a way to avoid the GAP in the memory space. Or whether it was an intentional feature of the Evaluation Compiler. I was answered fairly promptly, and the explanation was very reasonable. i.e. to make the Demo unusable for most projects. I think that the Keil Demo shows exactly how good the IDE and Tools are. I am inclined to agree with Erik and Andy. If I was genuinely prepared to pay thousands of dollars for a full licence, a Vendor would let me trial a full version. As a hobbyist, I can see absolutely no justification for buying a full licence for what is after all an obsolete chip family. It would also be dishonest to publish any method of circumventing the limitations. A Debugger / Simulator is an essential part of a toolchain. Most 8051 designs do not support JTAG or any other hardware debug interface. So it is probably only Compiling and Simulating that is on offer. There are more modern chip families which contain better peripherals etc. The chip manufacturers make them attractive to evaluate with a full set of hardware and tools. You still have to buy full licences but the chip future and wider audience make this cheaper. I disagree with Richard. I cannot imagine that you supply each Client with a full Tool licence. Still less, that you expect a Client to go out and purchase Tools by themselves. If you just want a Compiler, SDCC works quite well. David. |