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???
04/14/11 12:57
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#181878 - PCIe hard endpoint
Responding to: ???'s previous message
The Cyclone IV GX includes a hard PCIe endpoint so I'm not going to uses an external bridge. Unfortunately the Altera PCIe reference design doesn't compile/fit the targeted starter board but the FAE has promised to get it fixed.

The Cyclone IV includes embedded multipliers, not DSP blocks. Quite frankly, as long as it fits and meets the timing constraints I'm not going to get to stressed about the details.

List of 27 messages in thread
TopicAuthorDate
Verilog or VHDL?            01/01/70 00:00      
   maybe somewhat unrelated            01/01/70 00:00      
      How very true!            01/01/70 00:00      
   not so simple answer            01/01/70 00:00      
   Verilog is easier to learn            01/01/70 00:00      
      the holy war            01/01/70 00:00      
         Man, someone rubbed you wrong            01/01/70 00:00      
         It's not worth bloodshed            01/01/70 00:00      
   Thanks, more detail            01/01/70 00:00      
      PCIe in FPGA            01/01/70 00:00      
         PCIe hard endpoint            01/01/70 00:00      
            Job Requirements?            01/01/70 00:00      
               simple method            01/01/70 00:00      
               Regional?            01/01/70 00:00      
                  Well, Verilog was on the market first            01/01/70 00:00      
   In Europe            01/01/70 00:00      
      blah            01/01/70 00:00      
      Reference designs            01/01/70 00:00      
         and...            01/01/70 00:00      
   ELLA            01/01/70 00:00      
      Gee ... That's a new one to me ...            01/01/70 00:00      
         Note the dates            01/01/70 00:00      
            Yes ... VHDL was still pretty mysterious then ...            01/01/70 00:00      
            "widely used" should also be qualified            01/01/70 00:00      
               VHDL was also a Military/Industrial Complex product            01/01/70 00:00      
         productivity            01/01/70 00:00      
            I believe that's an implementation problem            01/01/70 00:00      

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