| ??? 04/13/11 16:23 Read: times |
#181859 - the holy war Responding to: ???'s previous message |
Justin Fontes said:
Generally, a beginner will start with Verilog and more advanced users will move to VHDL. Do you have any evidence to support this? Most people start with the language that their company has chosen. ;) If you say, "a beginner will start with Verilog because it is more C-like," please re-read my first post on this subject. The last thing the world needs is software guys trying to translate their sequential C code into an HDL. Of course, there are a huge number of suppliers of fpgas and their development software can be confusing. The synthesis component of the FPGA tools is actually the simple part. The rest of it? Yeesh. I have been told that Xilinx works extremely hard at trying to realize the synthesis portion of the fpga where the code is actually transformed into hardware. I have not heard much about the competitors do the same. What does that mean? Are you saying that the Xilinx architecture is more suited to synthesis than, say, Altera, or are you saying that their synthesis tool is "better?" I do know that you pay a stiff price for Xilinx and a cheaper vendor like Lattice sells their packages for about 1/3 the price, but you do get what you pay for. Xilinx (and Altera, and Actel, and Lattice) offers free (as in beer) versions of their tools. The free versions use the same synthesis engine (not crippled), the same place and route tools (also not crippled) as the paid-for version; the main difference is that the largest devices are not supported by the free version. (In the Xilinx world, you do have to pay for ChipScope and the EDK. But the main tools are free.) For the purposes of those books above, Xilinx has a free Webpack ISE that can be used to start learning right away, once the board and book have been had. Altera, Lattice and Actel also have free tools and available low-cost development boards. |
