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???
01/08/11 13:01
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#180487 - It is a pre-clear
Responding to: ???'s previous message
The initial CLR EN in your first example is simply a pre-clear to ensure that when the time comes to make the strobe pulse in the trailing part of the sequence it can be recognized.

You do not really need that there if you do two things.

1) Initialize EN low in the first logic that sets up the LDC interface lines.

2) Each operational routine that accesses the LCD includes both the SETB EN and CLR EN instructions in that order.

Michael Karas


List of 45 messages in thread
TopicAuthorDate
JHD162A lcd            01/01/70 00:00      
   5V LCD            01/01/70 00:00      
      in addition !            01/01/70 00:00      
         Matching output voltages with input requirements            01/01/70 00:00      
         C8051F120 has 5V tolerant Input/Output pins            01/01/70 00:00      
            Yes i have...            01/01/70 00:00      
            careful            01/01/70 00:00      
               what are...            01/01/70 00:00      
                  Powered components            01/01/70 00:00      
                     Thank You            01/01/70 00:00      
                  examples            01/01/70 00:00      
               active level converters            01/01/70 00:00      
                  Resistors not good way to reduce voltage            01/01/70 00:00      
                     Thank You...            01/01/70 00:00      
                     Per forgot one thing            01/01/70 00:00      
                        R*C            01/01/70 00:00      
                           delay            01/01/70 00:00      
            5V and micro and LCD            01/01/70 00:00      
   potentiometer            01/01/70 00:00      
      Film Capacitor??            01/01/70 00:00      
         thank you so much            01/01/70 00:00      
      SIL resistor            01/01/70 00:00      
         new delhi            01/01/70 00:00      
            Actually, it seems that they *do* know!            01/01/70 00:00      
         SIL Residtor *network*            01/01/70 00:00      
            correction...Yes they do know            01/01/70 00:00      
   Port I/O pin voltage            01/01/70 00:00      
      "5V-Tolerant" pins - already answered            01/01/70 00:00      
      5V tolerant, not 5V            01/01/70 00:00      
         Thank You            01/01/70 00:00      
            Maybe you can "get by" with this ...            01/01/70 00:00      
               "Absolute Maximum Limits" are not Operating conditions            01/01/70 00:00      
                  That's true, it's an absolute maximum/minimum            01/01/70 00:00      
                     Agree            01/01/70 00:00      
               3V3 logic runs at "TTL levels"            01/01/70 00:00      
                  The HD44780 claims to respond to TTL levels ... but ...            01/01/70 00:00      
   pull up resistor            01/01/70 00:00      
      do not tie a pin to gnd            01/01/70 00:00      
      many pull-ups            01/01/70 00:00      
         Do you mean...?            01/01/70 00:00      
      one more thing ...            01/01/70 00:00      
   high impedence            01/01/70 00:00      
   lcd EN signal            01/01/70 00:00      
      It is a pre-clear            01/01/70 00:00      
         Thank You            01/01/70 00:00      

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