If you find it necessary to continue to use the 8243, which I actually would discourage for performance reasons, you can probably solve the problem by adding a piece of programmable logic that decodes the external memory address space in a way compatible with the 8243. Ultimately, however, you'll have to deal with the fact that the 805x's are considerably faster than an 8048, as the 8048, IIRC performs an instruction in 15 clock cycles at up to 11 MHz, while the "classic" 805x performs an instruction cycle in 12 clock cycles at rates considerably higher than that, but classically at 12 MHz. The 805x's external memory cycle is confined to the second half of that microsecond, hence, the nREAD and nWRITE strobes are quite short. This may create a problem for the 8243. However, if you construct your I/O hardware in programmable logic, e.g. a relatively low-cost high pin-count FPGA, you can replace the 8243's with that and can then cause it to work quite satisfactorily with nearly any 805x family member. Further, since many modern 805x's are 3 volt devices, field-programmable logic is quite functional at that voltage level.

One other thing you might consider is that there are open-core IP's for both 805x and 8048 cores available, so that, should you choose to use an FPGA, the entire circuit, I/O, CPU, Code and Data Memory, and all, can be programmed into an FPGA. You might be daunted by such possibilities, but if your product is going to have a longer life, programmable logic may offer an interim solution until you can determine the optimal path. It may, in fact, be the optimal path.

RE