??? 12/10/10 16:49 Read: times |
#180063 - Setup and hold Responding to: ???'s previous message |
The chips are about 1cm apart on a 4 layer PCB with a ground plane, which should give a good ground.
SCL is top yellow trace, SDA is bottom blue trace, and the EEPROM calls for 0 nsec of hold after SCL goes low. If this is a problem then I don't know what to do about it. The documentation describes the existence of a register that, to quote: I2CxCCNT are 8-bit start/stop generation counters. They hold off SDA low for start and stop conditions. There is no description of what values to use, and experimenting with different values does not seem to make any difference. |