??? 03/14/09 10:26 Read: times |
#163448 - Still thinking single diode Responding to: ???'s previous message |
Robert Erlacher said:
It seems to me that he's driving rows with a current limited by the resistors R1..R8 This post indicates that the OP have now moved the resistors, based on a number of posts that they where incorrectly placed in the row drive instead of the column drive: http://www.8052.com/forum/read/163333 The problem is still that: 1) The new resistor value might not be the best. 2) The OP have not tried a minimalistic output code to just light up the display, without bothering with any bitmapped data, to verify the hw function. Robert Erlach said:
consider driving 10 cathodes rather than one column But the multiplexing scheme is never used to drive one LED unless the goal is that the display should only show one single pixel lit. It does not drive 1 LED. It does not drive 10 LED. It drives 80 LED or 240 LED or 960 LED or whatever length your shift registers are. For each SIPO chain. And you may have many shift register chains so the processor may shift out data a byte at a time into eight chains or two byte at a time into sixteen chains. And each chain is responsible for a large number of diodes. The special case is of course when all the SIPO chains fully spans every single pixel, in which case the display is fully DC-driven. And a multiplexed sign need not be limited to a 8:1 multiplexing factor. You may have a 16:1 or 4:1 or 2:1 multiplexing factor or even odd factors like 5:1. A lot depends on form factor and intended use. And don't focus so much on rows and columns. A sign need not be ten times wider as it is high. A lot of LED signs are used for symbols and other special applications in which case smaller PCB panel blocks may be orientated in different directions or maybe even zig-zag logically. A multiplexed sign is a concept, but that concept can vary (just as you can switch if you source or sink the columns) depending on need and requirements. But the reason for row/column is of course that rows and columns are easy to CAD when you do the PCB. A multiplexed sign with a zig-zag pattern within the panel would have a hard time to chain together all diodes controlled by a shift-register output, and/or all diodes controlled by a source/sink transistor. But think about it: Two SIPO lines driven at 1MHz would consume 80us for the data to 160 diodes and 640us for he data to all lines. The remaining time until a frame switch can be spent figuring out what to display next. The only problematic thing in this special case is that I guess the OP has a 12-clocker which does affect the output speed. And lack of memory may require that the program has to think about what to emit while emitting it. Having a shift register without latch will then mean that the output-enable will have to be deactivated for significant time when computing/emitting the next scanline - or all "off" diodes will glow while "on" bits are shifted past their position. Real-world signs are designed based on what is practical, which means that you in theory can come up with a number of other alternatives that have been already rejected. Robert Erlacher said:
That way you can work at a frame rate more tolerable than one LED at a time would allow. Since the processor works a scanline (or full sign for DC-driven) at a time the frame rate is just a function of how many bits you may send out per clock pulse and what clock rate you may use. Since it has already been established that the display does not show a diode at a time, the possible frame rate isn't affected by the LED count in this way. The maximum frame rate is controlled by how fast the processor can build the bitmap (either fully pre-built or built on-the-fly when sending out the data or by clocking data into an external character generator) and how fast the processor (or external character generator) can fill the SIPO. But it has already been established that the CPU don't have to be limited to a single SIPO chain spanning 80x16 diodes. A fully DC-driven sign could be built with a single 1280-bit SIPO. But the only gain of such a design would that it would be enough with a single data-out pin on the processor (maybe used with hardware SPI or similar for off-loading the shifting at 20MHz+). In reality, larger display controllers would support many SIPO to keep down the number of clock pulses required to fill a scanline or the full sign. Not unlikely one SIPO / scan line, in which case the OP display would be fully clocked out in 80 clock pulses - something even a 12-clocker would do quite quickly and then have almost 8ms available for thinking about the next frame. |