I think that this is a simpler decode:

assign addr[1:0] = {a1,a0};

// Read decodes
assign ctr0_rd     = !cs & !rd & (addr == 0);
assign ctr1_rd     = !cs & !rd & (addr == 1);
assign ctr2_rd     = !cs & !rd & (addr == 2);

// Write decodes
assign ctr0_wr     = !cs & !wr & (addr == 0);
assign ctr0_wr     = !cs & !wr & (addr == 1);
assign ctr0_wr     = !cs & !wr & (addr == 2);
assign creg_select = !cs & !wr & (addr == 3);

Also, it is unusual that you would assign read and write signals to be z. In real life, z signals always float to the exact state that you don't want. In the best case, you draw power. In the worst case, you may enable two different registers on an internal data bus, causing a conflict, and possibly destroying the chip.