I'm not sure you've verified what you think you have.

When I see specified that Vol=0.4 V at Iol=2.5 mA, as in the Toshiba part, I expect that, when I have an ideal load that sources 2.5 mA, a low DUT output attached to that load will sit at 0.4 volts. I don't see how your described test has shown that.

Likewise, when I see Voh=3.7 V at Iol=-2.5 mA, I expect that when I have an ideal load that sinks 2.5 mA my DUT output will sit at 3.7 volts. I don't see how your described test has shown that, either.

What I'd be inclined to do is to program a current source to 2.5 mA, in this case, have it sink current from the logic-high output, increasing the current until the voltage at the output reaches down to 3.7 volts. That voltage is adequate for most 5-volt CMOS and also for anything with a lower input threshold.

I'd do more or less the same, albeit in the complementary direction, for measuring Iol. I'd use Vol=0.4 V as the starting voltage and increase the current until it can't sink any more without rising above 0.4 volts.

I think your test proved nothing, since you've apparently switched the high and low test modes.

If you find that you can produce a 25 ns part that both sources and sinks >12 mA per output, and can drive at least two of its three entire 8-bit ports with all outputs loaded, then I'll consider 'em for a design-in and will use 'em as the opportunity arises.

With its 2.5 mA-specified outputs, the OKI part isn't getting much attention from me.

RE