??? 07/31/06 21:35 Read: times |
#121450 - That's a problem, all right ... Responding to: ???'s previous message |
If you use a supply plane as the gnd of a stripline, essentially a coax, you need the two outer planes to be at the same potential in real time. If you use power and gnd, they will most likely be doing different things at time T. That won't give as well-controlled an impedance as if they're both at the same potential. Using two planes and adjacent GND traces, in order to surround the fast clock with THE same potential, you have to drill holes to connect the two planes AND the adjacent tracks on the SAME plane as the clock. This uses lot of holes, and lots of board space. I've seen this done on inner layers, using blind vias, and it's quite an effort. Hopefully there are better ways. Generally speaking, it's a bad idea to have really fast clocks running around a board for distances over, say 2.5 cm, and even that can radiate quite a bit.
What's more, clock skew becomes an issue if your tracks exceed, 5.0 cm or so. That's why folks use those clever little PLL-based clock distribution chips, of which there are many. You distribute the slow reference clock, and multiply it up to where you need it, then pick a tap that has small enough skew to meet your needs. RE |